Das Video kommt von YouTube: erst beim Abspielen verbindet sich die Seite mit YouTube (Google).
Question on DMA (Direct Memory Access) | Input/Output Organization| COA | UGC NTA NET June 2021
Das Wichtigste aus dem Video
Tipp auf eine Zeit – das Video springt genau dorthin.
Transkriptautomatisch erstellt · 45 Zeilen
- Hello friends, welcome to Gate Smashers In today's video we are going to discuss
- question on DMA that is Direct Memory Access In input-output organization DMA is one of the most important topic
- So guys like this video quickly, subscribe the channel if you haven't done it yet And please press the bell button so that you get all the latest notifications
- So let's start with DMA question First of all, the statement is DMA controller transfers 16-bit words
- to the memory using the cycle-staling method The words are assembled from a device
- that transmits the characters at a rate of 2400 characters per second The CPU fetching the instructions at an average rate of 1 million instructions per second
- By how much time the CPU will be slowed down because of the DMA transfer Each character is of 8-bit
- So here the first question we have is that DMA controller transfers 16-bit data Means it sends two words at a time towards the memory
- First of all, what is DMA? Direct Memory Access Generally we have that the memory and the I.O. are connected through the CPU
- with the help of DMA, we are removing the CPU from the middle Because there is a speed factor here, we say that don't bring the CPU in the middle
- Memory and input-output devices will communicate directly with the help of DMA controller And we remove the role of the CPU from the middle
- Means the memory bus we have, the control of this bus will give the CPU to DMA And then DMA will transfer the data automatically
- So here what is connected with the I.O. controller? DMA controller is connected Which controls all the communicates
- So here if you look carefully at the question, the CPU fetches the instruction So obviously the CPU will fetch the instruction from memory
- But the CPU's fetching rate is 1 million instructions per second Means it fetches 10 raised to the power of 6 instructions in a second
- What is the time to fetch one instruction? 1/10 raised to the power of 6 seconds Which is 1 microsecond
- What can you say? Means the CPU on an average is accessing the memory after every microsecond The CPU on an average is accessing the memory after every microsecond so that it gets the instruction
- But if we talk about DMA, then where is the data coming from? From the device, take any input device
- And the speed of that input device, how many characters it is sending? 2400 characters per second
- Means 2400 characters are being sent in a second Means how much time it takes to send one character? 1 divided by 2400 seconds
- And how much data we have to send? We have to send 2 characters here Because DMA controller is sending 16 bits
- 16 bits means it is sending 2 words And each character is of 8 bits
- One character is of 8 bits So you can say that two characters are first brought by DMA controller
- And then it sends those two characters to the memory with the help of DMA controller Now here DMA controller has the first two words coming in what time?
- The input output device takes so much time to send one character So how much time it takes to send two characters? 2 divided by 2400 seconds
- Which is also known as 1 divided by 1200 seconds Means in this time two characters will come to DMA from input output device
- And after that when the data will come then DMA will request the bus from CPU And then CPU will give control to DMA of the bus and at this time CPU will be idle
- So we have to take this time out So what does it mean to take this time out?
- It means you take it out in such a way that after how much time data gets ready with DMA So after 1 divided by 1200 seconds both characters will reach DMA
- After that DMA will request the bus from CPU and then the bus will get to DMA And what will be the CPU strength? Will be idle or slow down
- This method is called cycle stealing Sometimes we send burst method too, burst method means we send the whole block
- What does cycle stealing method mean? That after sending one word or two words we will give the control back to CPU
- Then when we get two words again then we will take control of CPU, memory, bus and then we will give control again
- So how much time is the control coming after? After so much time that is 1 divided by 1200 seconds
- Because after every 1 divided by 1200 seconds both characters come to DMA And then DMA will take control of the bus and at this time CPU will be idle
- So if we calculate 1 divided by 1200 seconds then it will become 833.33 something microsecond We have converted it into microsecond
- Means after every 833.33 microsecond you can say that both characters are ready And then CPU will slow down and we have to take out this rate
- So after how much time, after every 833 CPU is slowing down then how will you take it out? 1 divided by 833.3
- If you calculate this 1 divided by, because after every 833.3 CPU becomes idle After every 833.3 CPU becomes idle because DMA has data
- So if you want to take this out that how much rate will come, how much will be your average? So 1 divided by 833.3 which is 0.0012
- And if we denote this in percentage because the options we have are in percentage So if you take this out in percentage then it will come to 0.12%
- Means your answer will come B So you can say that CPU will be slowed down by 0.12%
- 0.12% because after so much time both characters come to DMA controller And then DMA controller requests CPU to give me memory bus access
- And at the time CPU gives memory bus access, CPU will slow down or will be idle So this is how you have to calculate, so the answer is 0.12%
- Thank You.
Zum Nachlesen
Direct Memory AccessUnter Direct Memory Access (DMA, deutsch selten Speicherdirektzugriff) versteht man, wenn Computer-Komponenten selbstständig ohne Beteiligung der CPU Daten …
Column Address Strobe LatencyDie Column Address Strobe Latency (englisch, kurz CL oder CAS Latency), auch Speicherlatenz oder kurz Latenz genannt, ist die benötigte Zeit um eine Spalte …
ArbeitsspeicherZugriffe auf den Arbeitsspeicher durch den Hauptprozessor werden zumeist über ein oder mehrere Pufferspeicher oder Cache-RAMs (kurz „Cache“) optimiert. Im Cache …