6. OCR A Level (H046-H446) SLR2 - 1.1 CISC vs RISC
Craig'n'Dave
https://www.youtube.com/watch?v=PaeXsm5HGJs

Transkript (automatisch erstellt)

0:00 in this video we take a look at the differences between and the uses of sisk and risk processors
0:10 [Music] so at the core of all computers is what is known as the instruction set this is effectively
0:20 the set of all instructions written in machine code that can be recognized and executed by given processing unit or cpu
0:31 there are two main different categories of instruction sets that you need to be aware of there's the complex instruction set
0:38 computer sisk and the reduced instruction set computer risk so here on the screen is a high
0:47 level abstraction of a storage design for a generic computer and it's going to serve the purpose of our illustration so important things
0:57 to note we've got main memory at the top and it's got ten locations and they're addressed from zero zero
1:04 zero zero in binary through to one zero zero one we also have what we're labeling the execution unit which is going to carry
1:13 out all calculations now the execution unit can only operate on data that's been loaded into one of six registers
1:22 and we've labeled them r zero zero 0 to r 1 0 1. so our task is to find the product of two numbers
1:35 the first number is going to be stored in memory location zero zero zero zero the second number in zero zero zero one and then the result of the
1:44 calculation the product of those two numbers should be stored back in memory location zero zero
1:50 one zero so in a high level language this would be a line of code something like product equals num1 times num2
2:00 where each of those words are variables or locations so let's start with the complex instruction set computer
2:12 so cis gains to complete the task in as few lines of assembly as possible now this means the processor hardware
2:20 and the circuitry tends to be more complicated so it's able to understand and execute a series of operations
2:31 the cisc processor could include a specific instruction for multiplying two numbers and we're going to call that malt here we've
2:39 shown it on the screen when executed this instruction would load the two values into the register multiply them together and store the
2:49 result back out so malt is an example in our abstraction here
2:57 of a complex instruction it resembles the original command from the high-level language the compiler therefore is having to do
3:06 very little work to translate the original high-level language statement into low-level assembly code
3:18 however this complex instruction might take more than one machine or clock cycle in order to execute now we're going to come back to that
3:27 point a bit later when we compare the two so although much less common today than it used to be
3:35 the sisk architecture is mainly found in desktop computers and laptops intel's x86 processors still use the sys architecture
3:45 although more recent changes beyond the scope of this course mean they operate very much like a risk fashion
3:53 and they utilize micro code which allows them to leverage many of the benefits of the risk architecture which we're now going to look at
4:02 so with risk processes the aim is to use simple instructions which will be executed within a single machine or clock cycle now in our
4:13 generic computer example here that we're using at least we're going to say that the complex command such as
4:20 malt doesn't exist we would need to separate it into a number of simpler commands in this situation we're going to need
4:30 four lines of assembly two for loading the different contents of memory one for providing the product and
4:39 another to store the result back out whereas remember before with the sisk architecture we had a single low-level command that performed all of that
4:52 now there are more lines of code required in the assembly version than the high level version which only had one line
4:58 this means the compiler is now being required to do much of the conversion work more ram is needed to store the assembly
5:06 instructions so on the face of it it would seem that the risk architecture is much less efficient
5:15 but we come back to the point that with this system each instruction can be completed in a single clock cycle
5:24 these risk instructions require fewer transistors and less complex hardware this leaves more room for general purpose registers
5:32 in cash and we already know the benefits of that at speeding up a processor from a previous video
5:39 as all the instructions are uniform in terms of their execution time we can make use of pipelining another way of speeding up the processor we
5:47 discussed earlier the use of risk processing results also in lower energy requirements
5:58 risk architectures have become incredibly popular in low power and portable devices such as smart tvs
6:06 thermostats smart watches phones tablets printers home assistants tb sticks and many many more as such arm processors
6:17 and other architectures that work off of risk now make up well over 90 percent of all processors in use today
6:29 so here is a summary of sisk architecture on the left compared to risk architecture on the right
6:37 i'm not going to read it all to you but you might like to pause the video and take some notes
6:45 so having watched this video you should be able to answer the following key question what are the differences between the
6:51 risk and sisk architectures so that's everything covered in the specification so you can stop taking
7:00 notes but if you're interested in learning a little bit more and going a little bit deeper
7:05 then watch the remainder of this video so something not in the spec which is quite interesting to learn about
7:14 is known as the performance equation now this is an equation commonly used for expressing a computer's performance
7:23 potential now the sisk approach attempts to minimize
7:30 the number of instructions per program but while sacrificing the number of cycles per instruction
7:41 the risk philosophy does completely the opposite it attempts to reduce the cycles per instruction
7:48 but at the cost of the number of instructions that end up in the end assembly program you can clearly see here some of the
8:00 concepts that we've been talking about in raw numbers so look at the number of instructions available in sisk versus
8:09 risk there are a lot more instructions in the complex instruction sets than the reduced instruction set varieties
8:21 but you can see that there's a variable length of sisk instructions and of course this becomes problematic when we
8:28 try to utilize pipelining to increase performance now risk gets around this by fixed sized
8:38 instructions now even though risk-based processing has many advantages it did take well over a decade to gain
8:47 acceptance on a large commercial scale risk lacks software support versus sisk especially in the early days windows 3.1 and 90 to 5 were designed
8:58 with cisc processors in mind and most companies were unwilling to take a chance on risk which was seen as an emerging technology
9:07 in the beginning intel cisc processors were a major setback for the emergence of risk intel had enormous influence and
9:15 resources to throw at producing ever more powerful cis processes despite them becoming increasingly
9:22 unwieldy and difficult to develop today though intel x86 is arguably the only chip
9:32 that retains sisk architecture and even then if you dig a bit deeper below the surface you'll realize it implements many
9:39 features such as micro codes that allows it to operate in a risk type fashion the reduction in price of ram
9:49 and increased sophistication of compiler technology means the risk emphasis on software over hardware has become ideal
9:56 you can easily see from this graph that sales of risk-based processors far outstrip intel sysversons which peaked at
10:05 0.3 billion processors back in 2011. you